SerialICE uses a hardware interrupt to take control of the target CPU. Since the SIO is connected to one of the CPU's interrupt request inputs, it's possible that the SerialICE Controller may be prevented from taking control of the target system by masking of that interrupt. Of course, the target system software is usually written with the intention of minimizing the time during which interrupts are masked, in order to optimize the system's realtime response.
However, it's possible that inadvertent errors during program development could result in prolonged or even indefinite masking of interrupts. That would prevent the SerialICE Controller from placing the target in Debug mode, so care should be taken to avoid such errors.
Also, it should be noted that SerialICE itself makes use of the CPU's exception handling mechanism whenever a breakpoint occurs. Therefore, care must be taken in debugging exception handlers, to ensure that any necessary machine state is saved before a debug exception may occur. In particular, the EPC (Exception Program Counter), and SR (Status Register) must be saved, along with any other registers which may be used by the handler.
In practice, this means that breakpoints or single-stepping may safely be used within the body of an exception handler, provided it is written in such a way that all necessary state is saved as its initial action on entry. However neither of these features may be used during the first few instructions of the handler; these must be allowed to complete the task of saving essential machine state to the stack.